Qwen3.8 27B
Model card checked 2026-09-26 · Memory fit estimated; speed unknown unless a separately linked measurement matches your configuration.
Runtime support is moving quickly. Verify the current engine release and quantized checkpoint before downloading. Intel publishes an OpenVINO int4 export (hf.co/OpenVINO/Qwen3.8-27B-int4-ov), so the OpenVINO Model Server lane is available on Intel CPUs, Arc GPUs and NPUs since OVMS v2026.4.0. On Apple silicon the engine author's own 8-bit repack (nitinpanj/Qwen3.8-27B-Splash-HQ, 27 GB, MTP draft head) ran a live session on a 64 GB M5 Pro between 24.8 and 43.5 tok/s decode from a 34,605-token context out to 190,016 tokens, but it needs that author's Splash fork on branch q8: upstream Splash 1.0 rejects non-4-bit packages, so this is not a stock-runtime expectation. Re-checked 2026-09-26: the checkpoint was read again and the platform-level M5 Max cell gained its first two measurements, neither of which is a stock-engine number.
Sumber primer- coding
- reasoning
- multimodal agents
These are runtime examples, not validated installation recipes. Fit estimates assume quantized files; official repositories may hold full-precision weights. MLX, GGUF and TensorRT require matching conversions or engines.
vllm serve Qwen/Qwen3.8-27B --dtype autollama-server -m /path/to/verified-model.gguf --port 9931Search “Qwen/Qwen3.8-27B” → Load a Q4/INT4 build → Start Servermlx_lm.server --model Qwen/Qwen3.8-27BRuntime support is moving quickly. Verify the current engine release and quantized checkpoint before downloading. Intel publishes an OpenVINO int4 export (hf.co/OpenVINO/Qwen3.8-27B-int4-ov), so the OpenVINO Model Server lane is available on Intel CPUs, Arc GPUs and NPUs since OVMS v2026.4.0. On Apple silicon the engine author's own 8-bit repack (nitinpanj/Qwen3.8-27B-Splash-HQ, 27 GB, MTP draft head) ran a live session on a 64 GB M5 Pro between 24.8 and 43.5 tok/s decode from a 34,605-token context out to 190,016 tokens, but it needs that author's Splash fork on branch q8: upstream Splash 1.0 rejects non-4-bit packages, so this is not a stock-runtime expectation. Re-checked 2026-09-26: the checkpoint was read again and the platform-level M5 Max cell gained its first two measurements, neither of which is a stock-engine number.